Circuit Instability Predicts Coherent Drift in D-Brane Stability Simulators

Sterling Geisel, QBist Lab; Dr. Hideo Tanaka

Abstract

Sharma and Bitragunta propose a dual quantum-simulation architecture for categorical computations associated with D-brane stability: parameterized quantum circuits and topological anyon-inspired circuits. This working paper applies one Pudding Theory Postulate, Chaos Susceptibility, to the physical carrier of those computations. The claim is not that derived categories are altered by observers. The claim is narrower. When two implementations encode the same categorical transformation, the implementation with the larger measured response derivative to small coherent control perturbations should show the larger signed drift in its estimated stability observable. The topological implementation should suppress that drift if protection is physical rather than symbolic. A falsifying test requires matched circuits, calibrated perturbations, phase-randomized controls, a baseline drift model, and enough runs to resolve directional bias rather than ordinary error. This gives Pudding Theory an executable test in the domain of quantum simulation hardware.

Source Synopsis

Sharma and Bitragunta construct a proposed bridge between derived-category methods in D-brane physics and executable quantum architectures [1]. The mathematical setting is the bounded derived category \(\mathbf{D}^b(\mathrm{Coh}(X))\), where \(X\) is a smooth complex manifold and coherent sheaves represent the objects used to model D-brane configurations. The paper uses slope functionals, Chern-class data, derived morphisms, and categorical transformations as inputs to quantum-circuit descriptions.

The first branch is a parameterized quantum-circuit model. In that branch, categorical and geometric data are encoded through tunable gates and variational observables. A slope-like stability functional \(S(F)\) is represented as a measurable quantity. Chern-class inequalities are treated as constraints whose quantum-corrected form may include deformation terms. Derived morphisms are mapped to unitary transformations controlled by circuit parameters. The output expectation values are then interpreted as simulated estimates of stability conditions.

The second branch is a topological quantum-computing model inspired by Fibonacci anyons and \(SU(2)_3\) modular tensor categories. Braid and fusion operations are associated with functorial transformations, including spherical twists and autoequivalences. This part of the architecture is intended to reflect fault tolerance through non-local encoding. Logical information is stored in protected subspaces, so local perturbations should have reduced influence on the encoded operation.

The source paper is mainly architectural. It does not report a completed hardware experiment. Its value is to propose a computational translation layer between algebraic geometry, D-brane stability, and quantum circuits. The contrast between tunable variational circuits and topologically protected circuits is the relevant physical contrast for the present working paper.

Postulate Lens

The applied Postulate is Chaos Susceptibility. The fit is narrow but real. The source paper distinguishes a tunable circuit architecture from a topological architecture designed to resist local disturbances. That distinction is not a claim about classical turbulence. It is a claim about physical sensitivity.

For this paper, susceptibility is defined operationally, not by borrowing a classical Lyapunov exponent without measurement. Let \(g\) be a circuit implementation, \(O_S\) the measured estimator for the encoded stability class, and \(\epsilon\) a small coherent perturbation applied to a control channel. Define the circuit sensitivity exponent

\[ \Lambda_g=\log\left(1+\frac{\left|\partial \langle O_S\rangle_g/\partial \epsilon\right|}{\sigma_{0,g}}\right), \]

where \(\sigma_{0,g}\) is the baseline standard deviation of \(\langle O_S\rangle\) under unperturbed operation. This quantity is empirical. It is measured before the Pudding Theory comparison.

Chaos Susceptibility then predicts a monotone relation between \(\Lambda_g\) and signed excess drift under coherent perturbation. The postulate is applied only to the hardware implementation. It does not redefine sheaves, slopes, braid groups, Chern classes, or D-brane stability.

Pudding Theory Prediction

Pudding Theory predicts a three-way hardware ordering for matched categorical computations. The same categorical transformation should be compiled into three realizations: an ordinary parameterized circuit, a gate-emulated topological circuit, and, if technically available, a genuinely protected topological realization. Each implementation must estimate the same observable \(O_S\), with the same input object \(F\), the same number of shots, and the same classical post-processing.

The perturbation should be weak, coherent, and independently characterized. A practical protocol is a sinusoidal control perturbation applied to a phase, timing, or microwave-amplitude channel at amplitude below the calibrated single-gate error threshold. The amplitude might be set at \(0.1\sigma_c\), where \(\sigma_c\) is the standard deviation of ordinary control noise on that channel. The perturbation frequency should avoid known hardware resonances in the main test, with resonance scans reserved for a secondary study. Its phase should be fixed for the main coherent condition and randomized across blocks for the control condition.

The run structure should include at least three blocks: no perturbation, coherent perturbation, and phase-randomized perturbation. Each block should include enough shots to estimate \(\Delta O_S\) with confidence intervals smaller than the predicted effect. For near-term hardware, that likely means \(10^5\) to \(10^6\) shots per circuit condition, split over interleaved blocks to control drift. Device temperature, calibration state, crosstalk monitors, and readout-error estimates must be recorded.

Let

\[ \Delta O_S(g)=\langle O_S\rangle_{g,\mathrm{coh}}-\langle O_S\rangle_{g,\mathrm{base}}-\beta_g(t), \]

where \(\beta_g(t)\) is the fitted baseline drift from interleaved unperturbed runs. The Pudding Theory prediction is not merely that topological circuits have lower error. Standard fault tolerance already predicts that. The additional prediction is that the signed coherent component of drift scales with \(\Lambda_g\) and disappears, or greatly shrinks, when the same perturbation is phase-randomized.

The expected ordering is

\[ |\Delta O_S|_{\mathrm{PQC}} > |\Delta O_S|_{\mathrm{gate\text{-}emulated\ TQC}} > |\Delta O_S|_{\mathrm{protected\ TQC}}, \]

provided the measured sensitivity exponents follow the same ordering. If the gate-emulated topological circuit lacks physical protection, it may group with the ordinary parameterized circuit. That outcome would be informative, not embarrassing. The decisive variable is measured susceptibility of the carrier, not the symbolic label attached to the circuit.

Falsifiable Observable

The discriminating observable is the regression slope \(b\) in \(\Delta O_S(g)=a+b\Lambda_g+\eta_g\), estimated across matched implementations under coherent perturbation after subtracting baseline drift and crosstalk. The null model is \(b=0\), with no difference between coherent and phase-randomized perturbation beyond ordinary noise. If the signed excess drift \(\Delta O_S\) were measured to be statistically independent of the circuit sensitivity exponent \(\Lambda_g\), with \(b=0\) within a 95 percent confidence interval and no coherent-phase excess over randomized controls, this Postulate would be falsified.

Editorial Dialogue

Tanaka: The source paper is about categorical simulation. The mathematics has no need for Pudding Theory.

Geisel: Correct. The category is not the target. The hardware is the target. Sharma and Bitragunta give two implementation families with different sensitivity profiles.

Tanaka: Then the word chaos still risks overreach. A response derivative is not automatically a classical exponent.

Geisel: That is why \(\Lambda_g\) is defined as a measured circuit sensitivity exponent. It is not assumed from the algebra. It is measured from the device.

Tanaka: Fault tolerance already predicts the topological circuit will resist perturbation.

Geisel: It predicts reduced error. The Pudding Theory addition is signed coherent drift proportional to measured susceptibility, with phase-randomized controls suppressing the effect. That is a different observable.

Tanaka: What if the gate-emulated topological circuit behaves like the ordinary circuit?

Geisel: Then the emulation lacks the relevant physical protection. The result would support the hardware reading of the test.

Tanaka: And if no signed drift appears anywhere?

Geisel: Then this application fails. The D-brane construction remains an ordinary quantum-simulation proposal.

Discussion

This paper uses a minimal Pudding Theory intervention. That is necessary because the source paper is formal and architectural. It offers a circuit language for categorical constructions, not a completed experiment. The proposed test therefore begins only after ordinary validation: the circuits must first reproduce their intended stability estimators with adequate repeatability.

The main risk is confounding. Coherent perturbations can create mundane crosstalk, heating, mixer leakage, or calibration artifacts. Those effects must be measured directly. The phase-randomized perturbation is essential because it carries the same power spectrum while removing stable phase relation. Interleaving is also essential because slow device drift can masquerade as directional bias.

A second risk is the status of topological simulation. Gate-emulated braiding is not the same as physical non-Abelian protection. For that reason the comparator must be three-way. The prediction has content only if susceptibility is measured independently and then used to predict drift.

The conclusion would change if \(O_S\) cannot be estimated reproducibly, if the categorical compilation is not faithful enough for comparison, or if the perturbation couples directly into readout rather than computation. Those are experimental failures to exclude before interpreting the Postulate.

References

[1] Vaidik A. Sharma and Sainath Bitragunta. “High-Level Fault-Tolerant Abstractions for Quantum-Gate Circuit Design and Synthesis: PQC and Topological Anyon Architectures (TQC) for Categorical Computations in \(SU(2)_3\) TQFT and D-brane Stability.” arXiv:2602.06089v2, 2026. DOI not listed.

[2] Sterling Geisel. Pudding Theory: A Topological Theory of Information Fields. QBist Lab working manuscript, September 10, 2025.

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